New architecture for RFFT calculation

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Author
Hidalgo López, José Antoni
Tejero Calado, Juan Carlos
Fernández Ramos, José
Herruzo Gómez, Ezequiel
Gago Bohóquez, Alfonso
Publisher
IET - Institution of Engineering and Technology
Date
1994
Subject
Computer architecture
Fast Fourier transforms
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Abstract
A new architecture for the real-FFT (RFFT) calculation is introduced. This implementation reduces the computation time for the RFFT over other conventional implementations. In addition, the architecture is simple and permits a compact microelectronic design.
Description
Embargado hasta 01-01-2100
URI
http://hdl.handle.net/10396/32282
Fuente
Hidalgo-López, J., Tejero, J., Fernápdez, J., Herruzo, E., & Gago, A. (1994). New architecture for RFFT calculation. Electronics Letters, 30(22), 1836-1838. https://doi.org/10.1049/el:19941289
Versión del Editor
http://dx.doi.org/10.1049/el:19941289
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